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Layout Design Quality Model?

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sedenis

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I am interested in a Layout Design quality model that provides a taxonomy of layout design quality factors.

  • Does such a thing exist?
  • If not, how does one ensure/evaluate/enforce layout design quality?

Many industries have adopted various quality standards to assist in this endeavor. For instance, ISO/IEC 9126 addresses quality issues in software engineering and development. Does anyone know of anything similar in the domain of Layout Design?
 

As far I know, there exists good practices and device manufacturer recomendations which can be extended to general and specific application layout designs.
 
I've never heard of such a thing, other than gross density metrics
(which often are sacrificed for some other more important result,
when it comes to analog / RF). I think any "general" quality rating
has to comprehend what's sought, meaning it would no longer be
general.

To me it's art, everybody's an art critic, and I don't want to hear
some Methodology Weasel's opinion really. If some other analog
dude looks at and mumbles about it being pretty, that's good.
Or if they have a specific criticism that leads to improvement.
But some chump in the back row of the design review keeping
score, so he can publish a memo and say he helped... "forget"
him.
 
Analog circuits, do not draw from a library of devices. Thus there can be a wide variety of layouts for the same circuit, and finding the optimum layout for a given design is a very difficult task. It is the intuition of the designer and/or layout engineer that determines which layout will give optimal performance. Obviously there can and will be some error in this process, but finding the truly optimal layout would require unreasonable design and computation time.

Analog layout can be broken down into three phases: device generation, device placement and routing. In the device generation phase, three types of devices are necessary: MOSFET’s, resistors, and capacitors. After creating the devices, they must then be placed and routed. Because of the sensitivity of analog circuits to path differences, thermal and processing gradients, and parasitic resistances and capacitances, each stage of analog layout is crucial. The following sections discuss the creation of the different types of devices, MOSFET’s, resistors and capacitors and the routing between these devices. Within these sections, some of the placement issues found in analog layout are addressed.

Ref RFICdesign.
 

I hear you. And I agree that it's art. I know what I like in art, but trying to explain why I like a certain piece of art can be difficult.

Similarly, and taking the art metaphor a step further, when I see crappy layout, I know it. But explaining why it's crappy is sometimes difficult. This is why I've lately been thinking that there may be some set of characteristics that all quality layout designs share. If those could be identified, then explaining why someone's ill-conceived artwork should be trashed may be easier and have some authority behind it.

I think good practices (and better practices, and best practices) have an important place in generating quality layout designs. But my experience is that sometimes these good practice guidelines are put in place with the best of intentions but with little justification to back them up.

I propose that a set of common quality characteristics could be a foundation on which to rest good practices, checklists, and any other tools and documents that may be part of a layout design process.

Thanks for adding to the discussion.
 

In fact, there are available on the Web guidelines useful to use as a checklist, but each design has its proper requirements and just the developer is able to identify how much some factor may be prioritized or sacrificed in benefit of another.

when I see crappy layout, I know it. But explaining why it's crappy is sometimes difficult. This is why I've lately been thinking that there may be some set of characteristics that all quality layout designs share

More than good practices, technical knowledge on SI and EMI is fundamental on the skill of the layout designer, and in other words, the perception of a bad design would be then much more related to the theoretical base of who evaluate than to just identifying some existing or lacking pattern on drawing.
 
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