Since Intel bought altera, they are heading for the server market and focusing only on high-end, moving towards having CPU and FPGA on the same die so they can get high throughput between CPU and FPGA - with huge support for OpenCL.
Xilinx captured the Embedded CPU Market with their Zynq, Altera had a very weak and late attempt with the cyclone Soc and then basically binned it.
If you are a VHDL user - the Vivado is only just (2019.1) adding half decent VHDL 2008 support. Quartus has had it for several years.
Vivado Simulator is fine for basic stuff, but a waste of time for proper verification. Modelsim or Aldec are your only real options for this. Still no VHDL 2008 support for simulation (the synth now has better support than Simulation - odd)
Im now a heavy Vivado user, and honestly its hugely over-bloated. Quartus was a very usable compiler with Timequest being a good tool, and it had full SDC support (and has done for nearly 10 years). Quartus feels light weight compared to Vivado. Vivado also has this annoying habit of trying to take over control of your files. Quartus just does what it's told.
Xilinx have historically had a poor synthsis engine, and you could get better results with 3rd party synthesis (eg. from synopsys). Synopsys would openly admit that they could do no better than Quartus.
As for Aldec Vs Modelsim. Modelsim is usually the go-to tool. But ActiveHDL is MUCH cheaper. They also respond very fast to bug reports and will usually give you patches. Never got anything like that from Mentor.
Altera's IPs have always been much more user friendly. For example, the Altsyncram was a user configurable ram that the user could just instantiate and customise in their code. Xilinx forced you to generate a core for each and every ram you wanted, causes project bloat and it a pain to maintain or migrate. The XPM library has only just appeared for Ultrescale devices that gives the same functionality as the Altera Megafunctions, 10-15 years later than Altera.
IMO, Altera Docs have always been better than Xilinx. Altera will give detailed interface info, with very useful timing diagrams etc. Xilinx in comparison feels very basic.