Latest tools for layout parasitic extraction

[ic98]

Can you guys provide me with your opinions on latest tools which there are for layout parasitic extraction of submicron analog ICs?
which are the bests?

thanx

 

[ic98]

Nobody to answer?

 

[perado]

L-edit is a good free choice

 

[bastos4321]

Xcalibre
StarRCx
Assura

 

[ira2008]

my company use PVS tool to extract layout parasitic extraction.

PSVS is a verification system: that is, a specification language integrated with support tools and a theorem prover. It is intended to capture the state-of-the-art in mechanized formal methods and to be sufficiently rugged that it can be used for significant applications. PVS is a research prototype: it evolves and improves as we develop or apply new capabilities, and as the stress of real use exposes new requirements.

PVS 4.2 is the current version. It is open source (under the GPL license), and we also provide pre-built binaries using Allegro Lisp (commercial) and CMU Lisp (open source) for Linux, SunOS, PowerPC Macs, and Intel Macs (Allegro only). See the download page for details.