Latency vs Throughput @Memories

[ivlsi]

Hi All,

I was recently told that Latency and Throughput in the memory-based systems are the enemies of each another. So, if I want to improve the Latency then I need to pay by Throughput and vise verse.

Could someone explain why?

Thank you!

 

[amitjagtap]

In memory generally the two latency are there...Read Latency and Write latency.....Means number of clock cycles required to do read/ write operation.....It is property of memory. n depends how memory architecture is....rd n WR latencies may be different or same...Basically you can not change the latency of memory until n unless you are designing a memory...
So if memory take more clock cycles for rd or wr (more latency)...then throughput will be less..

 

[Ice-Tea]

As with all/most digital systems, you can increase clock speed by dividing the "task" into multiple tasks (pipelining). Same thing as an assembly line. The time the "task" spends on the assembly line is the latency. In theory, you could endlessly increase the speed at which the "belt" runs by making the sub-task at each station smaller and smaller. However, the time it would take to pass by each station would also increay (higher latency).