Large IOPATH delay in SDF file writtenout by DesignCompile??

[snleo]

After compile , i write out sdf file with write_sdf in DC, but in sdf file, the CLK to Q IOPATH delay values of SRAM, ROM & some DFF are 600++ , obviously something wrong, but the report of report_timing is correct, what is wrong ? Could anybody give me some advise ?

My DC version: Version Z-2007.03-SP1 for linux


Best Rgds

 

[pete_lu]

please check the timing report, to find which wire/port is the most large delay occurs, and then check the library to find whether there is corresponding timing settings.
for SRAM, ROM, different EMA setting can cause the large delay problem.
for DFF, the uncorrect large input transition time and large load can cause the problem. (the value is out of library range)

 

[snleo]

Re: Large IOPATH delay in SDF file writtenout by DesignCompi

Thanks a lot, pete_lu.
All the uncorrect delays are from CLK to Q. In my timing report of DC, all the delays are correct.

Could you tell me how to get the EMA setting of my SRAM/ROM library? Thanks.