Is tristates presence in the design decreases fault coverage

[pavankumarmnnit]

I am having design which requires tristates (for blocking) in certain conditions.i am getting fault coverage of 93.48(%) for my design by using Tetramax ATPG tool.

Tristates were properly driven with single instances.I heard that the asynchronous pins of tristates are not properly controllable.Is it the reason which is reducing fault coverage in my design

 

[jaydip]

you will have to make tristate bbuffer transparent when in DFT mode .. same like your internal reset and clock .. try that and see if coverage is increased .. also it depends how many tri states you have and where exactl they are seating in chip ..