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Is this dummy MOS connection correct ?

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satokazuo

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dummy.png

I just practice a NMOS layout with dummy.
After searching some associated threads, I know for a dummy NMOS all terminals (D, G, S, B) should connect to vss. But for the left dummy NMOS, since its drain has been connected to higher potential, I can’t connect all terminals together. So I connect its Source terminal to higher potential. Am I right? Is there any other suggestion ?
 

I think that's ok, if you don't mind the additional capacitance and leakage current.
 

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