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is this design synchronous or asynchronous

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ajeshar

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I have 2 Clocks - clkA and clkB in a design
ClkA(200Mhz) is derived from ClkB(400MHz) and both clocks drive different set of flip-flops.

Doubt - is this design synchronous or asynchronous
- how many clock domains are there in this design - 2 or 1.
 

FvM

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There are of course two clock domains. Because they are related, timing analysis is able to check setup- and hold times for domain crossing signals and either try to adjust the timing to achieve timing closure or report violations. Signals directed from the 400 MHz to the 200 MHz domain will most likely suffer from timing violations because they arrive together with the clock edge, supposed "derived clock" means a simple divider.
 

INS-ANI

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since both clocks are responsible for independent set of flops, there's two clock domain where each flop's operation is dependent only on domain clock.Hence it should be synchronous.
Please correct me if i am wrong :)
 

lty

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two clock domains
 

dftrtl

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Design having FLOPS is synchronous design.
you question should be whether these clocks are synchronous or not.They are synchronous to each other.
 

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