Is this a code for left shifting ???

[sree205]

left shifting

Hi,
is this code the same as shifting to the left ?

reg [7:0] a;

always@(posedge clk)
a <= {a[6:0],1'b0};

 

[tarkyss]

left shifting

yes, the fuction is the same,
but the synthesis result maybe different.

 

[sesl33]

Re: left shifting

Hi,
is this code the same as shifting to the left ?

reg [7:0] a;

always@(posedge clk)
a <= {a[6:0],1'b0};

This code also shift left:

always @(posedge clk)
a <= a << 1;

Which code is more commonly used? and, why?

 

[yuenkit]

left shifting

a <= a << 1; is more common:

it's more readable & intuitive. i believe the DC can generate a better circuit by this syntax.

Added after 3 minutes:

in other programing langauge, such as VB & C, concatenation operation will cause memory & runtime penalty.

I guess it will cause the same effect on the simulation runtime & synthesis runtime as well