buenos
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hi
is there a project or high-level functionality what can not be done in VHDL, only in ABEL for CPLDs?
I am not asking about low-level details, like resetting a flip-flop, but for example producing the same signal sequence on pins, or similar cases...
my colleague told me, most of our board-glue-logic projects must be done in ABEL, because they couldnt make the same functionality (I dont know if they ment only low-level only or high level too, like board level glue logic function) in VHDL.
is there a project or high-level functionality what can not be done in VHDL, only in ABEL for CPLDs?
I am not asking about low-level details, like resetting a flip-flop, but for example producing the same signal sequence on pins, or similar cases...
my colleague told me, most of our board-glue-logic projects must be done in ABEL, because they couldnt make the same functionality (I dont know if they ment only low-level only or high level too, like board level glue logic function) in VHDL.