Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronic Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Is the VCO duty cycle always 50%?

Status
Not open for further replies.

dhasmana

Member level 5
Joined
Jan 19, 2005
Messages
88
Helped
8
Reputation
16
Reaction score
0
Trophy points
1,286
Location
Bangalore , India.
Activity points
578
Hi,

Is it true that the duty cycle of every VCO is 50% (assuming no variation because of PVT)? If we add inverters in the VCO for getting rail to rail output then they will add jitter due to threshold variations and thus duty cycle will drift away from 50%.Please comment in this regard.

Regards,
Jitendra.
 

RDRyan

Full Member level 2
Joined
May 24, 2007
Messages
133
Helped
20
Reputation
40
Reaction score
3
Trophy points
1,298
Location
China
Activity points
1,976
VCO Duty cycle

Some times, a VCO does not have a 50% duty cycle precisely.
Adding inverters after the VCO, duty cycle will drift, I agree.
but I don't think the jitter is added by inverters, jitter is produce by VCO itself.

Ryan
 

dhasmana

Member level 5
Joined
Jan 19, 2005
Messages
88
Helped
8
Reputation
16
Reaction score
0
Trophy points
1,286
Location
Bangalore , India.
Activity points
578
VCO Duty cycle

Don't you think that drift from 50% duty cycle is same as jitter?This drift in duty cycle is a random process or a deterministic?I mean the duty cycle varies from cycle to cycle or just stays around a value away from 50%?
What is the difference between deterministic jitter and random jitter?I mean in terms of the origin /reason for their existence?

Regards,
Jitendra.
 

amarnath

Advanced Member level 1
Joined
Apr 24, 2003
Messages
402
Helped
25
Reputation
50
Reaction score
7
Trophy points
1,298
Activity points
3,141
VCO Duty cycle

jitter does not mean drift in duty cycle, it means the variations in the zero crossings of the output clock, if you plot all the zero crossings at a single point you will gent to know the jitter.


amarnath
 

dhasmana

Member level 5
Joined
Jan 19, 2005
Messages
88
Helped
8
Reputation
16
Reaction score
0
Trophy points
1,286
Location
Bangalore , India.
Activity points
578
VCO Duty cycle

Can you please elaborate on "variations in the zero crossings of the output clock"
I did not understand this point.Do you mean the variation in the clock edge timing , i.e when is the edge apearing?
 

amarnath

Advanced Member level 1
Joined
Apr 24, 2003
Messages
402
Helped
25
Reputation
50
Reaction score
7
Trophy points
1,298
Activity points
3,141
VCO Duty cycle

basically if your system is getting clocked onj postivie edge, then take the positive edge as a reference and then measure the varioations of the zero crossings with reference to this edge.


amarnath
 

    dhasmana

    points: 2
    Helpful Answer Positive Rating

dhasmana

Member level 5
Joined
Jan 19, 2005
Messages
88
Helped
8
Reputation
16
Reaction score
0
Trophy points
1,286
Location
Bangalore , India.
Activity points
578
VCO Duty cycle

Ok.This is what I understood.Now if the +ve edge is reference and -ve edge is varying with time, then it also means that the duty cycle (from one cycle to other) will vary.These two phenomena are not independent I guess.Jitter will translate in duty cycle variation also?Please comment.
 

JPR75

Junior Member level 1
Joined
Aug 20, 2007
Messages
15
Helped
4
Reputation
8
Reaction score
1
Trophy points
1,283
Activity points
1,350
Re: VCO Duty cycle

Hi,

Is it true that the duty cycle of every VCO is 50%
If you look at datasheets, you will see that duty cycle are specified between 45% - 55% (sometime 40% - 50%).

If we add inverters in the VCO for getting rail to rail output then they will add jitter
Adding any component will increase the jitter. This is due to the thermal noise, flicker noise etc. of the component itself.

due to threshold variations and thus duty cycle will drift away from 50%
Jitter is not a drift, it is a variation (pseudo oscillation) from the ideal position. Your duty cycle will change 50% +/- jitter, but the mean value will be 50%.
 

    dhasmana

    points: 2
    Helpful Answer Positive Rating

RDRyan

Full Member level 2
Joined
May 24, 2007
Messages
133
Helped
20
Reputation
40
Reaction score
3
Trophy points
1,298
Location
China
Activity points
1,976
Re: VCO Duty cycle

dhasmana said:
Ok.This is what I understood.Now if the +ve edge is reference and -ve edge is varying with time, then it also means that the duty cycle (from one cycle to other) will vary.These two phenomena are not independent I guess.Jitter will translate in duty cycle variation also?Please comment.
Jitter will not translate in duty cycle variation as you thought. Jitter is said in one clock period, if +ve edge is reference, -ve edge change, and if we consider two -ve edge as one period, then the period will not change, because the -ve edge has changed the same. and jitter is generated. But the duty cycle has change, because the duty cycle is considering between +ve and -ve edge.

Ryan
 

gavin168

Junior Member level 3
Joined
Feb 8, 2007
Messages
26
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,283
Activity points
1,449
VCO Duty cycle

how to simuliate jitter?
 

eroica

Newbie level 4
Joined
Sep 7, 2007
Messages
7
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,329
Re: VCO Duty cycle

The duty cycle variation is another term called DCD(Duty Cycle Distortion) jitter. Since DCD is bounded, it is a kind of DJ(deterministic jitter). In deed, DJ can be decomposed in to ISI, DDJ, DCD and PJ(periodic jitter).
As you may know, jitter from VCO output is unbounded, which means it is random jitter.
Therefore, unless you add extra logics(or circuits) in proper way, they may introduce some jitter, which may look like DJ. However, in general, RJ is dominant term in clock-like signal.
 

buckaroo

Member level 3
Joined
Apr 23, 2007
Messages
60
Helped
6
Reputation
12
Reaction score
4
Trophy points
1,288
Location
Beijing
Activity points
1,626
Re: VCO Duty cycle

dhasmana said:
Hi,

Is it true that the duty cycle of every VCO is 50% (assuming no variation because of PVT)? If we add inverters in the VCO for getting rail to rail output then they will add jitter due to threshold variations and thus duty cycle will drift away from 50%.Please comment in this regard.

Regards,
Jitendra.
the invertor definitely add jitter, however, it's very small
 

JPR75

Junior Member level 1
Joined
Aug 20, 2007
Messages
15
Helped
4
Reputation
8
Reaction score
1
Trophy points
1,283
Activity points
1,350
Re: VCO Duty cycle

how to simuliate jitter?
To simulate a deterministic jitter, a simple way is to use frequency modulation around the main frequency. Not very realistic, but easy to make.

--------
Electrocoop
 

northeast1

Full Member level 2
Joined
Jun 21, 2007
Messages
147
Helped
4
Reputation
8
Reaction score
0
Trophy points
1,296
Activity points
1,812
Re: VCO Duty cycle

RDRyan said:
Some times, a VCO does not have a 50% duty cycle precisely.
Adding inverters after the VCO, duty cycle will drift, I agree.
but I don't think the jitter is added by inverters, jitter is produce by VCO itself.

Ryan
no, you are wrong, the inverter will add jitter to the clock, because of the inverter has worse psrr
 

Status
Not open for further replies.
Toggle Sidebar

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top