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Inverted output at collector, why?

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Hi guys,
With very little experience and training on transistors, can someone explain why the output of collector is inverted in a common emitter amplifier? I suppose the same reason goes for fets too?

Thanks in advance!
 

when transistor saturates

Vce=.2V

that is why if we apply >.8V on base we will get Vce=.2V
<.8 output Vcc

see on digital integrated circuits
by Taub and Schilling
 

Explanation can be simple. Increase of base current or Vbe causes increase of collector current. Both currents Ib and Ic flows into the device (transistor, fet). In order the collector current can flow you should connect Rc resistor between collector and supply voltage. Voltage drop on Rc resistor will increase when collector current increase, so the voltage on collector drops, decrease. Signal between collector and ground is larger and oppostie in phase to base signal.
 

Hi,

1) When Vbe increase, Ib increase
2) When Ib increase, Ic increase.
3) When Ic increase, Vce decrease.

So combining 1) and 3), when Vbe increase, Vce decrease, that is an inverter
 

consider a transistor connected in the common emitter configuration having a resistor at the base and its collector. now you must have read that the more the base voltage the more the collector current. thats because raising the base voltage increases the voltage between the base and the emitter which in turn causes an increase in the collector current (this is what is called the transistor action)

now the voltage between the collector and the emitter is Vce. and consider that there is no emitter resistor so the emitter is connected to ground. therefore Vce is the voltage between the collector and the ground. now this voltage is given by Kirchoff's voltage law as

Vce = Vcc - Ic * Rc

where Vcc is the collector supply, Ic is the collector current and Rc is the collector resistance.

now as you go on increasing the base voltage, Ic will go on increasing as well and because Vcc is constant, Vce will decrease. thats simple mathematics!!!!!!

try it yourself keep Vcc to a constant level and increase the value of the factor Ic*Rc and see what happens to Vce. it will decrease.

so by increasing the base voltage the voltage at the collector decreases. this is why when the base is given a continuously varying voltage (like a sine wave) the output is in the inverted form.

i hope that helps.
 

or you can view it this way. putting more base current, we will get more collector current. this is positive current gain. this current gain when go through collector resistor will give a positive voltage gain. so, if you look at the voltage across this resistor, it's increasing if base current increases. however, this voltage is relative to Vcc and not ground. if the voltage is measured against ground, then Vce decreases.

so, it all depends on which common node you are measuring against.
 

summarizing all, you can note that output is inverted clearly in a small signal model, becaus e Vdd is signal ground, (the voltage in this node doesn't change with signal), in a large signal analisis, you can see the current increasing into transistor since vin increses, making the voltage trought resistor increasing. a KVL shows the voltage in the collector decreasing, it means more negative referenced to vdd (small signal ground). and the answer to the second question is yes, is the same for mos transistors.
 

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