[SOLVED] interview question regarding memory cascading

[yuvalkesi]

Hi,
Sorry if it's the wrong forum to ask this, but I couldn't find any other suitable forum for this question. (Administrator: Feel free to pass this in case there's more suitable forum ;-))

Anyway,
I have 2 memory chips. Each one is 1Kb address bus, 8bit data bus.
The question is how to implement both chips to get 2kb address bus, 16bit data bus?

Now, the 2kb address bus part - that I know... because I take the MSb (for example) and use it for a CS (chip select) input for memory No.1, and for memory No.2 with a NOT gate, because 2kb bus are 11bits wide, which is 1 bit more than 10bits for 1kb bus, and in this way I connect 10 bits for each rom (same 10bits for address bus).
BUT,
for the 16bit data bus... I'm confused. If I only use one rom at a time (because of the CS input), I cannot increase the data bus width...
It could be a tricky question with no solution. I failed on this one, so maybe there's no solution and the interviewer expected me to say that total data bus should be the same as each rom (i.e., 8bit data bus & 2kb address for the whole package).

Any ideas?

Tom

 

[TrickyDicky]

There is no solution. You can have 1k at 16bits or 2k at 8bits.

 

[yuvalkesi]

Ok, thanks!
That's what I thought (back at home, not during the interview, unfortunately. ha-ha-ha).