Interview Question: Infinite Always Loop

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spartanthewarrior

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Hi All,

I had been asked one question in verilog.

I have some 100 always blocks and 1 block is getting into INFINITE loop, which causing simulations to not to proceed.

How can I figure out which always is causing this problem. Also $display is not the answer I am looking for.
 

How about commenting processes out and figure out which one is causing the problem?
 

What about pressing the break button in simulation, i believe it'll stop the simulation and add a break point at the place it was looping inside! .. give it a try you'll not loose
 

Yeah Giving break should work.
 

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