These don't answer my question
YES,Are you asking about the resistor connected to the collector?
Yes, that's right.My question is about open collector IC outputs.
Is it true that pull up resistors are used with NPN transistors while pull down resistors are used with PNP ?
So,
If I use programmable internal pullups or pulldown in a "smart IC" (like an FPGA or MCU) the tool automatically knows to select the correct transistor to use on the silicon fabric according to the pull type I requested?
NPN for pull up
PNP for pulldown
Is this correct ?
Pull-up and pull-down resistors inside each IOB optionally force a floating I/O or Input-
only pin to a determined state. Pull-up and pull-down resistors are commonly applied to
unused I/Os, inputs, and three-state outputs, but can be used on any I/O or Input-only
pin. The pull-up resistor connects an IOB to VCCO through a resistor. The resistance value
depends on the VCCO voltage (see Module 3 for the specifications). The pull-down resistor
similarly connects an IOB to ground with a resistor. The pull-down resistor is powered by
VCCAUX in the ExtendedSpartan-3Afamily and by VCCO in the Spartan-3/3E families.
The PULLUP and PULLDOWN attributes and library primitives turn on these optional
resistors. By default, PULLDOWN resistors terminate all unused I/O and Input-only pins.
Unused I/O and Input-only pins can alternatively be set to PULLUP or FLOAT. To change
the unused I/O Pad setting, set the Bitstream Generator (BitGen) option UnusedPin to
PULLUP, PULLDOWN, or FLOAT. The UnusedPin option is accessed through the
Properties for Generate Programming File in the ISE software.
If I use programmable internal pullups or pulldown in a "smart IC" (like an FPGA or MCU) the tool automatically knows to select the correct transistor to use on the silicon fabric according to the pull type I requested?
NPN for pull up
PNP for pulldown
Do you have a datasheet of such a device that can have a selectable NPN or PNP open collector output?
I don't know of such a device.
I have only seen devices with selectable push-pull or open drain output (which disables the high side driver) but not selectable type of open drain output.
A standard tristate driver available for most programmable logic or processor pins can be however programmed to implement open collector/open drain function of both polarities.
No I don't think so. But basically any tristate push-pull output stage can be used this way. Dedicated open-drain mode, as you report it for the NXP processor has a special purpose because it e.g. allows an UART to operate in open drain mode. But in software bit-banging, you can also implement an active high (PMOS) open drain stage.So there are devices that have an open drain mode where the user can either enable the upper side or the lower side mosfet?
active_high_od_out <= '1' when active = '1' else 'z';
active_low_od_out <= '0' when active = '1' else 'z';
No I don't think so. But basically any tristate push-pull output stage can be used this way. Dedicated open-drain mode, as you report it for the NXP processor has a special purpose because it e.g. allows an UART to operate in open drain mode. But in software bit-banging, you can also implement an active high (PMOS) open drain stage.
In case of FPGAs, where everything is user logic, you can implement active low open drain or active high open drain at will, by a simple HDL expression:
Code:active_high_od_out <= '1' when active = '1' else 'z'; active_low_od_out <= '0' when active = '1' else 'z';
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