Interfacing a memory card with AT89C52 for storing the code

[IanP]

keil error a9

I am just curious: what do you need so many SRAMs for :?:
Now that you have designed hardware, do you have firmware (monitor-like software) to run it :?:

There is 8051-monitor :!: written by SYCON-Technologies some time ago and it should run on your system as it also uses P1.4 and P1.5 to switch banks/pages ..
This hex file fits into 27C512 (64Kb) EPROM, so if you would like to try it make sure that all address lines (incl. A15) are connected to the EPROM-socket ..

Rgds,
IanP

 

[Help]

Re: AT89C52 code size

Hi,

I am just curious: what do you need so many SRAMs for :?:

I'm using many 32kB SRAM and ls157 driver on the system because i wanna to achieve 128kB memory as 8051_ExpCard1.JPG show.. Another reason hope can know how to store more CODE in SRAM.

Now that you have designed hardware, do you have firmware (monitor-like software) to run it :?:

Don't have...

Yes, I would like to try using this 8051-monitor method and see what's the result. Now then i know why we need (64Kb) EPROM. It is for switching bank's/page's and monitor perpose.

It is the circuit correct?

Thank you.

 

[IanP]

Re: AT89C52 code size

Logically speaking, looks good, however, if data/code is to be kept in the battery-backed-up SRAM you have to monitor the supply voltage and disconnect SRAM just before power goes off, so data/code gets not corrupted ..
One option is to use set of two MAXIM ICs, one that provides perfect reset and one that synchronously with the reset signal switches between Vcc and Vbat ..
Have a look at DS1232(reset) and DS1210(SRAM supervisory) ..
Signal from the DS1210 should control all 4 /CE pins , and therefore PG0-PG4 should be combined with BANK1 /RD and /WR ..
Think about it ..

Rgds,
IanP

PS. Attached is the HEX file with the SYCON TECHNOLOGIES monitor ..
As far as file transfer is concerned, this monitor works with BINARY files, so you will have to convert Intel-Hex files to binary using Hex-to-Bin converter (available through GOOGLE) ..

 

[Help]

Re: AT89C52 code size

Hi,

the DS1210 should control all 4 /CE pins , and therefore PG0-PG4 should be combined with BANK1 /RD and /WR ..

DS1210 only have one /CEO chip enable output. What do you mean PG0-PG4 should be combined with BANK1 /RD and /WR ?

Very hard to find the hex to bin convertor but i only get it from keil forum, Hex2bin and bin2hex convertor. It is using Command Prompt to create.

C:\>hex2bin slc_v3.hex slc_v3.bin
HEX2BIN Version 1.06
Copyright (c) 1995 Prog....
.....
...
Status: Creating binary file.
Status: HEX to BIN conversion was successful.

It will generate the slc_v3.BIN file but the file is empty file. 0kB

I have try other sample .hex and .bin file (BH.hex, BB.bin) which is original convert from Keil compiler. I have try to use the original file to do conversion, the original file size is 5kB but after conversion the file will gain more file size and the data will not be a same compare with origin file.

Is it i'm using a wrong convertor? May i know what convertor you use?

Thank you.

 

[IanP]

Re: AT89C52 code size

DS1210 only have one /CEO chip enable output. What do you mean PG0-PG4 should be combined with BANK1 /RD and /WR ?

Connect /CEO to all 4 /CE and produce /[PG0 AND WR], /[PG0 AND RD] for U11, /[PG1 AND WR], /[PG1 AND RD] for U12 and so on ..
This will protect data in SRAMs when transition(s) on Vcc occures ..

The SLC_V3 is already a BIN file, attached are HEXBIN2.exe, BIN2HEX.exe, SLC_V3.hex and SLC_V3.file(bin) ..

Rgds,
IanP

 

[Help]

Re: AT89C52 code size

Hi,

I'm not so understand how to connect the circuit that you had mention. Please check the attached file. If PG0 NAND /WR and the output will connect to SRAM pin-27. There is not correct!! If this the case, how about U10 driver?
The previous design PG# was a selecter page's (U11,U12,U13 and U7). The U10 will do WR or RD either on BAN0(EPROM) or BANK1(SRAM).

Thank for your convertor. After the SLC_V3.hex burn into EPROM. What's the next step should i do? Is it the time to write the firmware part?

Thank you.

 

[IanP]

Re: AT89C52 code size

Not exactly ..
Leave the EXP1 and EXP2 SRASMs as they were before (remove U18) ..
/PG0 - /PG3 are L-active, so are Bank1/WR and Bank1/RD .. use inverters and NANDs - see attached picture ..

Frankly, I don't like R1/C1 as the reset circuit ..
The DS1232 (or equivalent) generates both RESET and /RESET and it's really much better option than just R-C tank ..

As one of the options in the SLC_V3 allows you to execute program in BANK1, write a simple program that allows you to jump back to the MONITOR in BANK0 ..

Rgds,
IanP

 

[IanP]

Re: AT89C52 code size

If you need to view/edit HEX or BIN files, here is a handy freebie, called 1Fh:

https://www.4neurons.com/1Fh/

Rgds,
IanP

 

[Help]

Re: AT89C52 code size

Hi Ianp,

The picture that you attached is a OR gate. I already re-draw the circuit. I think it should work on this way. Please have a look...

Thank for you advice ya.. I will try to order this few IC 27C512 (64kB ROM), K6T1008C2E-DB70 (128kB SRAM), DS1232 and DS1210. This all component quite special type have to order. I will order it soon.

As one of the options in the SLC_V3 allows you to execute program in BANK1, write a simple program that allows you to jump back to the MONITOR in BANK0 ..

I have no idea how to write the program. I'm using C language. Please can you guide me how to write the program to interface the BANK0 1st? I'm using KEIL's. This compiler provided the Bank Switching function L51_BANK.A51. May be you can have a look..
I still playing this function...but still haven't know how to use it..


Thank you.

 

[IanP]

Re: AT89C52 code size

When you buy SRAM make sure that it is low-low power ..
They usually are labeled with letter(s) L or LL ..

Switching from bank to bank is quite simple ..
It is done with two instructions:
CLR P1.6 - to switch from BANK_0 to BANK_1
and
SETB P1.6 - to switch the other way around ..
Just remember that when bit P1.6 is changed from 1-to-0 or 0-to-1 the processor begins to fetch instructions from the other bank at the address of the next instruction after the instruction that initiates the bank switch ..
Take a look at the attached example, where by pressing [R] or [r] you will switch back from SRAM to MONITOR in EPROM ..
In this example, as the SETB instruction is placed at the very end of the SRAM, the PC will roll-over from FFFFh to 0000h ..

Rgds,
IanP

 

[Help]

Re: AT89C52 code size

Hi,

May i know what is the code doing?

Di_Cont1:	CJNE		A, #52h, Di_Cont2		; Was it 'R'
		LCALL		Screen_Cls
		LJMP		Switch_Bank_0
			
Di_Cont2:	CJNE		A, #72h, Di_Cont3		; or 'r'
		LCALL		Screen_Cls
		LJMP		Switch_Bank_0

Why don't have Switch_Bank_1? I have tested, there is no any alteration signal on P1. May i know what's the output result after pressed 'r' or 'R'?

I have delete the line-1 and line-2 then add $MOD51. What's the line-1 $NOPAGING mean? Is it important?

//$NOPAGING
//$MOD252
$MOD51

I would like to confirm again, the /EA on MCU is connected to GND or Vcc?

Thank you.

 

[IanP]

Re: AT89C52 code size

I would like to confirm again, the /EA on MCU is connected to GND or Vcc?

SLC_V3.hex suppose to run from external EPROM, so /EA has to be connected to GND ..
After reset (or power-on) P1.6 = 1 and the processor fetches instructions from EPROM (BANK0) ..
One of options in the MONITOR program is to [E]xecute program from RAM (BANK1) and when you press [E] the P1.6 pin is cleared, P1.6 = 0 ..
When the program runs from RAM the only option you have is to press [R] or [r] to return/switch from BANK1 to BANK0, so when you press that key P1.6 is changed from 0 to 1 and program starts running back from EPROM ..

I have delete the line-1 and line-2 then add $MOD51. What's the line-1 $NOPAGING mean? Is it important?

$NOPAGING causes the LST file to be in one piece, without numbering pages - it's really not important ..

May i know what is the code doing?

It checks which hex number has come from SBUF (serial port) to ACC ..
52h in ASCII means 'R'
72h in ASCII means 'r'

Rgds,
IanP

 

[Help]

Re: AT89C52 code size

Hi,

One of options in the MONITOR program is to [E]xecute program from RAM (BANK1) and when you press [E] the P1.6 pin is cleared, P1.6 = 0 ..

The code only have 4 case which is..
Loop_1: // Ser_In
Di_Cont1: // 'R'
Di_Cont2: // 'r'
Di_Cont3: // Loop_1

There is no 'E' case in the code. How can i write the code? Please guide me...

Thank you.

 

[IanP]

Re: AT89C52 code size

....

; ====================================================================

;[R]e-start from Bank1 ..
Switch_0_1:
		LCALL		Screen_Cls	
		LCALL		Ret_Mess

M_Di2:	DB	R, LF, 'press [e] or [E] to execute code in Bank1', ESC

Loop_0:		
		LCALL		Ser_In

Ei_Cont1:	CJNE		A, #45h, Ei_Cont2		; Was it 'E'
		LJMP		Switch_Bank_1
			
Ei_Cont2:	CJNE		A, #65h, Ei_Cont3		; or 'e'
		LJMP		Switch_Bank_1

Ei_Cont3:	LJMP		Loop_0	

.....

; ====================================================================

; Switch to BANK_1
			ORG		0FFFEh
Switch_Bank_1:	CLR		P1.6

; and program starts from address 0000h in BANK_1 ..

; ====================================================================

...

It's just an example ..
You already have it in the SLC_V3.hex ..
If you want to see it you need to use disassembler ..

Rgds,
IanP

 

[Help]

Re: AT89C52 code size

Hi,

Ya, after i add the code the P1.6 will become Lo.

I have no direction. How to start writing the application program. How to write the code to SRAM? Is it we still need to do the bootloader?

Thank you.

 

[IanP]

Re: AT89C52 code size

You really have to start with 64Kb EPROM and SLC_V3 in it ..
On power-up you will see on the Hyperterminal screen options that are available in this monitor firmware .. see attached picture ..

When your hardware is ready you can upload IP_Firm2.bin to SRAM (using U-option) and run it (E-option) ..
I think any application that you write should have an option to switch back from BANK2 to Bank1 and also be careful about manipulating pins P1.4, P1.5 and P1.6 ..

Rgds,
IanP

 

[Help]

Re: AT89C52 code size

Hi,

Ya, the SLC_V3 is in EPROM. When power-up there is nothing show on the Hyperterminal screen. Is it any physical memory address related start at wrong address? Like previous case (Posted:11 Oct 2008 7:10) Hello example.

Is it we not need to burn any hex file in MCU? just burn the SLC_V3 in EPROM then it will do already?

Thank you.

 

[IanP]

Re: AT89C52 code size

All what is needed is the EPROM with SLC_V3 ..
The /EA pin has to be connected to GND to enable external memory operation ..
When the /EA pin is grounded the internal program memory is irrelevant ..
Also, A15 has to be connected to the EPROM ..
Code in the EPROM starts from address 0x0000 ..

Rgds,
IanP

 

[Help]

Re: AT89C52 code size

Hi,

May i know what is the serial baudrate? What is the Crystal value?

Thank you.

 

[IanP]

Re: AT89C52 code size

I think the default baud rate is 19200 @ 11,059200MHz ..

Rgds,
IanP