In Synopsys On-Line Documentation every error&warning have their own code. Here is RTDC-115 description from SOLD:
RTDC-115 (warning) The following cells only drive asynchronous pins of sequential cells which have no timing constraint. Therefore retiming will not optimize delay through them:
DESCRIPTION
This warning message occurs when any paths to asynchronous cells of sequential cells
do not have timing constraints. Therefore, retiming does not include cells on these
paths that only drive such pins into the retiming optimization.
WHAT NEXT
This is a warning message only. No action is required on your part.
SEE ALSO
balance_registers, (2), optimize_registers (2).
You can also read "Design Compiler Reference Manual: Register Retiming" for additional information about DC conatraints requirements.