init pin injtag programming for spartan

[ahmadagha23]

hi,

1-is it needed to pull down init pin before an during JTAG programming?

2-my board contains a fpga and a xc18v04 prom which their cclk,prog,done,din pins are connected to each other and to parralel cable (III). in which mode I must use impact and does it program both PROM and fpga simoltaniously?

regards

 

[sachingorkhe]

Hi Ahmadagha,

Your 1st query - No, it is not neccessary to pull down INIT pin during JTAG programming, coz in JTAG mode FPGA will use only its 4 dedicated pins (TDI,TCK,TMS,TDO).

2) Did you connect any device to JTAG or all devices(prom, fpga) in a jtag chain?

Plz clear this to know your query more precisely.

Thanks,
Sachin

 

[ahmadagha23]

thanks for your intent to reply my questions

in the first query is it needed to connect init pin to p.p. cable III coz in impact window in slave serial mode it draws init pin but in schematic of cable the init pin wasn't used. I think befor using JTAG mode we must pull down init isn't it?


about 2nd query : yes I connect them in jtag chain but I don't want to use JTAG mode. Is it needed to use JTAG mode for configuration?


the new question for JTAG programming my spartan board must I use BSDL in my VHDL or it is needed only for using JTAG after configuration?

thanks

 

[sachingorkhe]

Hi ahmedagha,

For your 1st query, I would say 'No' for PP-III connection, you did not worry about INIT pin for Slave serial connection. But this INIT pin of FPGA must be connected to processor or controller which ever you are going to use. See datasheet of Spartan for this connections. (see attached file)
As per Serial Slave connections, you need to connect CCLK, DONE, PROG and DIN pins with VCC and ground pins(total 6 pins).

As to your 2nd query -
If you don't want to configure ur FPGA using JTAG chain then you must need to connect following pins with your processor or controller as well, as per the Slave serial connection in the Spartan Datasheet.

CCLK
DIN
INIT_B
DONE
PROG_B

For JTAG programming thru' processor you must have driver in C which uses XSVF file to configure your FPGA. See Xapp058 for more details, if this is the case.

Regards,
Sachin