Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Info: hot n Well problem with AMS 0.35um process

Status
Not open for further replies.
S

santiniredinkov

Newbie level 1
Joined
Mar 10, 2010
Messages
1
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,287
Hi gurus,

I am trying to do a simple inverter layout,
when i run DRC i am bugged by this DRC error of
Info: hot nwell.

vdd! is labelled on to the M1,
so thats not the mistake i have done !

I dont have any clue absolutely how to solve,

Any help is highly appreciated.

Regards,
santini
 

maybe the hot nwell need to coincide with Nwell.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top