Info about Impedance-Controlled Routing

[mk3]

I'm Protel DXP user and need some info about Impedance-Controlled Routing. I'm at my first experience with this routing constraint, and this
make things more difficult to me too of course...

I understand I can set the min - max preferred characteristic impedance value Z0, in the Signal Integrity Rules, and this value will be used to calculate the track widths by the formulas in the Layer Stack Manager, with all other parameters entered about materials, dielectrics and thicknesses. But where is that Z0 is related to signal frequency? In my example: I need wires of 50ohm impedence with signals 100MHz max. freq. How can I set up things to get my goal?

And the formulas that are shown in Layer Stack Manager can be modified or adjusted to get different/better/more specific calculations?

regards

 

[pisoiu]

mk3. In theory, the impedance of a trace is constant, it not depend on the frequency, it depends only on physical caracteristic of the trace and Er of the substrate. The losses depends on the freqency, and this you'll be affected when using high speed signals. However, in practice, the Er of the substrate is not constant over a wide range of frequencies, and this is why the impedance of the trace may vary with freq.

 

[mk3]

So this is why frequency doesn't appear in Protel DXP formulas to calculate track impedance? And where can I find Er values for various materials (FR4, FR5...)?

 

[pisoiu]

Exactely. The Er you'll better obtain it from your pcb manufacturer. Roughly you can consider Er for FR4 at 4,6-4,8, and loss tangent around 0.02 . Often, pcb manufacturers have application notes for their substrates in which physical parameters are given for various trace impedances. Ask them, maybe this will spare your time. Another issue would be the frequency of the signals. In high speed design, is not important the maximum clock frequency you use, it is important the highest frequency component which will appear in your system, and this is F=1/2t , where t is the fastest rise or fall time (whichever is less) in your system.

 

[roli]

In www.pcbstandards.com I guess....

 

[_i386sx25_]

There is an IPC standart on this issue :

"IPC-2141 Controlled Impedance Boards and High Speed Logic Design"

It doesn't tell you how to do it in P*otel DXP , but helps to understand the concept and basics.

Best Regards

 

[hcet]

go to https://www.polarinstruments.com/ -> Controlled Impedance -> downloads.