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Actuactly via count does effect characteristic, as on a two layer board you would use them to tie grounds together, use for power from one side of a board to another.
Why 24 thou, they could be 20 thou or 30 thou, the land could be 50 or 60 ?
Normally, the vias i give is from 20 mils to 40 mils depending on the trace and current flow.
Anyways, my concern was if the via count is increased, how would it affect the design characteristics. i.e during the testing process of the pcb with assembled components.
I and others can help with generic PCB design guidelines.
For specific Allegro questions, there are others with much more experience of that product than myself (nearly 3 years since I used it) as I use Cadstar.
As to vias, where possible for routes I try to minimise them, but with todays high count BGAs etc you can get via density of 200+ vias/square inch for standard build PCBs.