Important concepts for standard cell dsign engineer interview

[BB11]

Important concepts for standard cell design engineer interview

Hello

Could anyone please list out the topics for a standard cell design engineer interview and also name few books or technical papers to refer ?

Thanks and Regards

BB

 

[tadeoman]

* Basic circuits
- RC circuits - Capacitor charge and discharge time
- RLC circuits - Resonant frequency, Damping factor, Quality factor
- KVL, KCL rules
- Wire design: Resistance/square, capacitance

* MOS transistors
- Voltage transfer curves
- NFET vs PFET tranistors
- Modes of operation of transistors
- Logic families: pass gates, transmission gates, complimentary cmos, domino logic, nora logic

* Complementary MOS digital design
- The inverter
- Logical Effort sizing
- Logic gate design: and/or/xor and so on
- Charge sharing
- Memory state elements: latches (SR, D, T, flipflops)
- SRAM and ROM design


* Static Timing analysis
- Rise time
- Fall time
- setup time
-hold time
- clock skew
- clock jitter
- Power IR drop
- Monte carlo simulations
- Process cornern analysis


* Verilog
- Blocking vs non. blocking
- Combinational feedback loop (avoidance)
- Latch design
- SRAM, ROM Memory design
- Mealy and Moore State machine design

* Layout design
- DRC rules
- LVS test
- Basic CMOS manufacturing, DFM (Design for Manufacturability)

* Mixed signal design (unlikely)
- ESD protection circuits
- Filters using OpAMPS
- OpAmps
- ADCs

In Amazon there is a book: VLSI interview questions. It might help you:
https://www.amazon.com/VLSI-Interview-Questions-Answers-Sony-ebook/dp/B007BS01GW

Good Luck,

 

[BB11]

Thank you tadeoman!