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Implementation of HR neuron model using analog computer technique

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zulqar

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Hi Everyone,

I am simulating(using HSPICE) HR neuron model using analog computer technique but I am not getting the required response. If anyone can figure out what might be the problem , I will be extremely thankful.
I am using ALM124 model of opamp and MLT04 model of multiplier.



Code:
***HR***

Vdd 100 0 DC 10
Vss 99 0 DC -10
Vconst 7 0 1.5
Vbias1 1 0 DC 1
Vbias2 12 0 DC 1
Vbias3 14 0 DC 1
Vbias4 4 0 DC 1
Vref1 15 0 -1
Vref2 16 0 1


.options post
.tran 1m 500m

X1 1 2 3 100 99 ALM124
RxI 7 2 873k
Rxy 8 2 110k
Rxz 9 2 330k
Rxx2 10 2 611
Rxx3 11 2 15
Cx 2 3 0.01uF ic=0

X4 4 5 6 100 99 ALM124
R1 3 5 10k
R2 5 6 10k

X5 3 3 0 20 100 99 MLT04
X6 20 3 0 21 100 99 MLT04
E1 10 0 20 0 2.5
*As output of MLT04 Vout=0.4Vin^2 , so output is amplified to get Vout=Vin^2
E2 11 0 21 0 -6.25
*As output of Cubic Generator is Vout= 0.16Vin^3 , so output is amplified and inverted to get Vout=-Vin^3



X2 12 13 8 100 99 ALM124
Ryy 8 13 22k
Ryx2 10 13 73
Rye 15 13 522.8k
Cy 13 8 0.1uF ic=0

X3 14 15 9 100 99 ALM124
Rzz 9 15 10.5k
Rzx 6 15 1.8k
Rzh 16 15 13.2k
Cz 16 15 100uF ic=0



 .MODEL ALM124 AMP
 +       C2=  30.00P     SRPOS=   .5MEG      SRNEG= .5MEG
 +       IB=  45N         IBOS=   3N           VOS=  4M
 +     FREQ=  1MEG      DELPHS=   25          CMRR=  85
 +     ROUT=  50            AV=   100K         ISC=  40M
 +    VOPOS=  9.5      VONEG=   -9.5        PWR=  142M
 +      VCC=  10           VEE=   -10         TEMP=  25.00
 +     PSRR=  100          DIS=   8.00E-16     JIS=  8.00E-16




* MLT04 SPICE Macro-model Rev. A, 12/93
* JCB / ADI
*
* Copyright 1993 by Analog Devices
*
* Refer to "README.DOC" file for License Statement. Use of
* this model indicates your acceptance of the terms and pro-
* visions in the License Statement.
*
* Node assignments
* X-input
* | Y-input
* | | Ground
* | | | W-output
* | | | | Positive supply
* | | | | | Negative supply
* | | | | | |
.SUBCKT MLT04 3 4 2 1 99 50
*
* X AND Y INPUT STAGES
*
V1 3 20 10.5E-3
C1 20 2 3E-12
R1 20 2 1E6
I1 20 2 2.3E-6
V2 4 21 10.5E-3
C2 21 2 3E-12
R2 21 2 1E6
I2 21 2 2.3E-6
*
* MULTIPLIER CORE
*
G1 98 22 POLY(2) (20,2) (21,2) (0,0,0,0,0.4E-6)
R3 98 22 1E6
C3 98 22 1E-15
*
* INPUT STAGE
*
I3 99 28 1E-4
Q1 24 1 26 QP
Q2 25 23 27 QP
R4 50 24 11635
R5 50 25 11635
R6 26 28 11119
R7 27 28 11119
E1 23 98 POLY(1) (22,98) -10E-3 1
*
* GAIN STAGE AND DOMINANT POLE AT 145HZ
*
EREF 98 0 POLY(2) (99,0) (50,0) 0 0.5 0.5
G2 98 29 (24,25) 8.59E-5
R8 29 98 5.82E8
C4 29 98 1.89E-12
D1 29 30 DX
D2 31 29 DX
V3 99 30 2.2
V4 31 50 2.2
*
*POLE AT 30MHZ
*
G3 98 32 (29,98) 1E-6
R9 32 98 1E6
C5 32 98 5.31E-15
*
* OUTPUT STAGE
*
R10 99 1 80
R11 1 50 80
G4 1 99 (99,32) 12.5E-3
G5 50 1 (32,50) 12.5E-3
D3 32 33 DX
D4 34 32 DX
V5 33 1 0.72
V6 1 34 0.72
G6 98 35 (1,32) 12.5E-3
D5 35 36 DX
D6 37 35 DX
V7 36 98 DC 0
V8 98 37 DC 0
F1 99 50 POLY(2) V7 V8 3.65E-3 1 1
*
* MODELS USED
*
.MODEL DX D
.MODEL QP PNP(BF=143)
.ENDS       

.end
 

FvM

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Why don't you show expected and actual output?

Did you test your design with ideal (behavioral) amplifiers and multipliers to see if it's a problem of the models or the principle circuit?
 

zulqar

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Hi FvM,

I have tested models of opamp and multiplier individually and they are working fine.
The obtained and expected output is shown in the attached figure.
 

zulqar

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Hi Everyone,

If there is anyone who has experience of designing analog computer based circuits , please have a look at the code and the circuit . I will be extremely thankful if anyone could suggest me what might be the problem.
 

BradtheRad

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Looking at your expected output...
It resembles the chirp pattern in a 'singing bird' project, which was a kit I purchased at Radio Shack years ago.

I believe it operates by a capacitor powering an oscillator for a few cycles, until its voltage drops, then the oscillator shuts off, the capacitor is charged up, then starts the oscillator again.

The first chirp lasts a long time and starts at a higher pitch, because that is when the capacitor is charged to a higher initial voltage.

I've also seen this called a 'squegging' oscillator. Each cycle consists of a burst of many clicks, then a period of silence.
 

zulqar

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Hi BradtheRad,
So what could be the reason of not getting the expected output?
 

BradtheRad

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Hi BradtheRad,
So what could be the reason of not getting the expected output?

I suspect that you need to design a bit of instability into your oscillator. In other words it needs to turn on and off more easily.

Looking at your graph, it appears that it is not shutting off. The voltage continues to rise.
 

zulqar

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I suspect that you need to design a bit of instability into your oscillator. In other words it needs to turn on and off more easily.
Does that mean I need to use lower capacitor values?
One more thing which I doubt is the DC level of the signals. Can you please comment how DC levels should be adjusted?
 

FvM

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I see the problem that you didn't actually explain why you expect the output waveform shown in post #3. I presume you are referring to a research paper presenting this results. Does it also explains why the waveforms are genrated as they are?

Presumed the circuit in post #1 would generate the expected waveform when build with ideal components (don't know if this is true), it's likely a simple amplifier offset that causes the unwanted rising baseline. Why didn't you consider my suggestion in post #2 to try the simulation with behavioral components?
 

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