Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

[SOLVED] Image to pixel conversion

Status
Not open for further replies.

manik045

Newbie level 6
Joined
Feb 16, 2010
Messages
13
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Location
Dinajpur
Activity points
1,404
Dear All

I want to convert an image to its pixel value in FPGA system like altera. In this system i had to read the pixels very often. Can any one help me what kind of altera devices are needed so that i can input an image on that FPGA based device the device will give me pixel value in RAM.


Thanks in advance.
 

Every device can do what you're asking. Please ask a note specific question
 
Thanks a lot for replying TrickyDicky.

The specific question is that i want to convert gray scale image into pixels and store it into a RAM which is designed in Altera cyclone II code.

And the image conversion code should be in Altera. Please help me regarding this issue.
Thanks in advance.
 

i want to convert gray scale image into pixels and store it into a RAM

The question remains vague, since you did not specify the format with which this image was formatted, or in other words, the codec used to split the pixels into a data stream. Based on your above statement "In this system i had to read the pixels very often" it is assumed you are getting frames from a camera.
 
Again thank you very much andre_teprom.

Actually i have to do a job related to water marking. On that project, there is also a encoder. On that encoder part, i have take the grey image and convert the image to its pixels. That's why i have to take a gray scale test 8bit image into a ram. From that ram i have to read the image pixels also. That's the necessity. Please help me.

If it still remains vague. Please inform me.
 

You say "do a job", so you are getting paid to do this project and expect volunteers to mentor you through the entire design process?
 

water marking

Assuming that you want to measure the water level by detecting the surface of the water, this could be done with pattern matching algorithms, on which the main task is to determine the relative position of the pattern (the water level) within a region of interest. You should have some background knowledge on that areas if you want to do some job related to that, here is not the suited place to learn anything, but to ask for help for specific issues. Take a look on Wiki, there are many concepts there that could give you a lot of insights.
 
Dear ads-ee

Actually this is not like that you are thinking. I am doing it for my own. There is no transaction regarding this issue. By the way, thank you for your advice.

Thanks to andre_teprom. You also mentioned the right thing. I have to study more.
 

A digital watermark is an embedded signature in a file e.g. for identification purposes, similar to the watermark on a bank note. See https://en.wikipedia.org/wiki/Watermark

The question is nevertheless unclear. A digital image is already stored in pixels, or in case of an encoded image in data structures that can be easily decoded into pixels. An analog picture is converted to pixels by using a image scanner.

Perhaps you can clearly tell in which form the image data is available.
 

If it still remains vague. Please inform me.

Question 1: How does the FPGA get the image data? If you are in a planning phase, list the requirements. (eg, some hardware sensor or some computer interface like PCIe/Ethernet/USB)
Question 2: What format is the image data in when provided to the FPGA?
Question 3: Is this format different from the format needed for processing?
Question 4: How large does the image need to be for processing? This will determine if external memory is required or not, or if the image can even fit into external memory.
Question 5: What are the read requirements? This will help determine if local caching of data is helpful. It also determines if any special memory layout would be useful.

At this point, you should have provided enough info to answer your original question.
 
Dear vGoodTimes,

Thanks for your good suggestions.

Now i am explaining the idea to you. I have a ram that i have designed in altera quertus.
The code is as follows.


Code Verilog - [expand]
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
module ram_8bit (we,re, clk, add, datin, datout);
input [6:0] add;
input we, re, clk;
input [7:0] datin;
output[7:0] datout;
reg [7:0] datout;
reg [7:0] mem [127:0];
 
always @(posedge clk) begin
 
if (we) mem[add] <= datin; //data write
 
else if (re) datout = mem[add]; //data read
else datout=datout;
end
endmodule



I have made simulation of the RAM. Now i want to take the test image (gray scale image) to this ram. From this RAM i will read the pixels values in bits. Thats why i need to conversion. There are two problems here i found.

1. How can i take the image into the RAM? I am a newbie. I have no idea.

2. As the image is gray scale image, i need the bit values of related pixels. Do i have to convert the image? My knowledge may lag but please help me.

Thanks in advance.
 
Last edited by a moderator:

Dear ads-ee,

Thanks for your reply. I got the first one. The 2nd one mentions that gray scale image have only the intensity of the RGB value. Suppose an image (8 bit gray scale image) has only 256 pixels. I have to convert all the pixels into its related 8bit value. 1st pixel value is 48 so it will be 00110000. It will be for every one.

Thanks in advance. If i can make you understand, please reply me.
 

1. How can i take the image into the RAM?
You make the signals we logic 1 so this if statement is taken, which then applies add and datin to the assignment of the mem array.

Code Verilog - [expand]
1
if (we) mem[add] <= datin; //data write



Not that it matters much, but most Verilog coders write their arrays like so: reg [7:0] mem [0:127];.

Also it would be better to use Verilog 2001 module port syntax instead as the older style is redundant and more prone to mismatched signal name errors.

2. As the image is gray scale image, i need the bit values of related pixels. Do i have to convert the image?
I have no clue what this means...what do you consider to be a related pixel?

- - - Updated - - -

Dear ads-ee,

Thanks for your reply. I got the first one. The 2nd one mentions that gray scale image have only the intensity of the RGB value. Suppose an image (8 bit gray scale image) has only 256 pixels. I have to convert all the pixels into its related 8bit value. 1st pixel value is 48 so it will be 00110000. It will be for every one.

Thanks in advance. If i can make you understand, please reply me.

Ah, Verilog isn't VHDL. Verilog is very very loosly typed language.

All of these are valid initial value assignments:

Code Verilog - [expand]
1
2
3
4
reg [7:0] byte = "c";
reg [7:0] byte = 1;
reg [7:0] byte = 8'b0000_1100;
reg [7:0] byte = 8'hF1;


so there isn't any "magic" to convert between a decimal and a binary value in Verilog. Just use it as if it was decimal or binary.
 
Probably a better version of my example above would have been to use the same value for all assignments:

Code Verilog - [expand]
1
2
3
4
5
// initialize byte to integer 99
reg [7:0] byte = "c";  // the ASCII c character
reg [7:0] byte = 99;  // the integer 99
reg [7:0] byte = 8'b0110_0011; // the binary equivalent of 99
reg [7:0] byte = 8'h63;  // the hex equivalent of 99

 
Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top