entity selector is
port(
toLed: out std_logic_vector (3 downto 0);
sel0: in std_logic:='0';
sel1: in std_logic:='0';
sel2: in std_logic:='0';
clk: in std_logic
);
end selector;
architecture main of selector is
--signal sel00:std_logic:='0'; local signals case
--signal sel11:std_logic:='0';
--signal sel22:std_logic:='0';
begin
proc: process (sel0,sel1,sel2)
variable current:std_logic_vector(2 downto 0);
begin
current:=sel0 & sel1 & sel2;
if (current = "000")then
toLed(2)<='1';
else toLed(3)<='1';
end if;
-- case current is --this case works
-- when "000" => toLed(2) <= '1';
-- when others => toLed(3) <='1';
-- end case;
end process;
end main;