JulianCas
Newbie level 4
Hi,
I was trying to implement a finite state machine, and I started using If else statement, then I realized that no matter the condition, all were met which was not expected, I was expecting only one. Then I tried using the case control and it worked. The following example is a simplified version of my program that reflects this condition. The commented section works but the if-else control statement does not, both conditions make the LED lit.
A couple of points:
- When I initialized the IN ports it is to simulate that there is another entity that initializes those inputs with std_logic '0', that entity provides 3 outputs with 0 state and are connected to the 3 inputs in this entity. In this example I just initialized those inputs with '0'.
- If I use local signals initialize to '0' instead of the input ports, the else-if control works which I tried to understand this behavior but so far no success.
I can move on with the case statement but if any of you can help I really appreciate it.
I was trying to implement a finite state machine, and I started using If else statement, then I realized that no matter the condition, all were met which was not expected, I was expecting only one. Then I tried using the case control and it worked. The following example is a simplified version of my program that reflects this condition. The commented section works but the if-else control statement does not, both conditions make the LED lit.
A couple of points:
- When I initialized the IN ports it is to simulate that there is another entity that initializes those inputs with std_logic '0', that entity provides 3 outputs with 0 state and are connected to the 3 inputs in this entity. In this example I just initialized those inputs with '0'.
- If I use local signals initialize to '0' instead of the input ports, the else-if control works which I tried to understand this behavior but so far no success.
I can move on with the case statement but if any of you can help I really appreciate it.
Code:
entity selector is
port(
toLed: out std_logic_vector (3 downto 0);
sel0: in std_logic:='0';
sel1: in std_logic:='0';
sel2: in std_logic:='0';
clk: in std_logic
);
end selector;
architecture main of selector is
--signal sel00:std_logic:='0'; local signals case
--signal sel11:std_logic:='0';
--signal sel22:std_logic:='0';
begin
proc: process (sel0,sel1,sel2)
variable current:std_logic_vector(2 downto 0);
begin
current:=sel0 & sel1 & sel2;
if (current = "000")then
toLed(2)<='1';
else toLed(3)<='1';
end if;
-- case current is --this case works
-- when "000" => toLed(2) <= '1';
-- when others => toLed(3) <='1';
-- end case;
end process;
end main;