karthikkrv85
Full Member level 3
Dear all...
I would like to know how the hardware part of I2C is implemented. I mean, consider data register is a buffer and each bits will be left shifted and transmitted in the SDA (with open drain logic). Similarly what kind of logic are behind the status registers and what are the gates, transistor or buffers are available.
Thanks and regards,
karthikkr
I would like to know how the hardware part of I2C is implemented. I mean, consider data register is a buffer and each bits will be left shifted and transmitted in the SDA (with open drain logic). Similarly what kind of logic are behind the status registers and what are the gates, transistor or buffers are available.
Thanks and regards,
karthikkr