I2C multi masters

[Kittu20]

Hello everyone,

I've read the I2C specification multiple times, but I'm still confused about how bus arbitration works.

Let's say we have three masters: A, B, and C. Initially, all three are idle, meaning their SDA and SCL lines are high. When they all want to control the I2C bus at the same time, but Master B pulls the SDA line first, gaining control. How do Masters A and C know that Master B has control of the bus?

What mechanism informs them? I've seen descriptions mentioning an AND-wired connection, but I only understand the operation of an AND gate. I don't understand how each master monitors the SDA line before generating the start condition

 

[KlausST]

Hi,

How do Masters A and C know that Master B has control of the bus?

All pull only LOW
All check the signal line levels.

--> When one master does NOT pull down, but the signal still is LOW (obviously by another master), then it loses arbitration.

******
But the usual way is the natural timing difference. In reality they don´t start at exactly at the same time.

Klaus

 

[FvM]

This recent thread discusses the same topic

arbitration

I'm reading the I2C communication protocol in link en.m.wikipedia.org/wiki/I%C2%B2C and came across a statement about i2C Bus arbitration. I'm struggling to fully understand the concept behind this statement and would appreciate clarification. In idle state, both the SDA (data) and SCL...

www.edaboard.com

 

[Kittu20]

I'm still trying to understand how arbitration works with Wired AND and how each master monitors its own output. Could you please explain it to me in simpler terms?

 

[dick_freebird]

The wired-AND (open drain, passive pullup) allows outputs
to share a single wire. They need to play nice. Either they
manage themselves, or they have to get managed. The same
would be true of a tri-state bus, except for the load and drive
qualities. Arbitration is its own issue.

 

[KlausST]

I'm still trying to understand how arbitration works with Wired AND and how each master monitors its own output. Could you please explain it to me in simpler terms?

What exactly is difficult to understand?

It´s rather simple:
* if it does NOT send out LOW
* but at the same time the line is LOW

It´s similar than
* Your light switch (in your room) is in position OFF, but the light still is ON.

Klaus

 

[Kittu20]

Thank you all I got it:

The "wired-AND" concept refers to the physical connection of devices on the I2C bus, where each device's output is connected to the SDA line through an open-drain configuration.

When a device wants to transmit data, it typically checks the SDA line to see if it is currently pulled low. If the line is low, it indicates that another device is already transmitting.

The process of checking the SDA line to determine whether it's high or low, occurs during the arbitration phase before the start condition of a transmission.

Before any device can start transmitting data on the I2C bus, it must ensure that the bus is idle, meaning that no other device is currently transmitting. This is essential to prevent data collisions.

 

[KlausST]

Hi,

When a device wants to transmit data, it typically checks the SDA line to see if it is currently pulled low

Indeed I guess one can say that both the MASTER as well as SLAVE check both SCL as well as SDA all the time.

****
It´s all decribed in the specification. Please refer to it!
Post a timing diagram (idle, start, addressing... ) and we can discuss about it!

In short:
When a MASTER wants to transmit: (in timeline order)
* it first needs to wait for BUS_IDLE, which is both SCL and SDA = HIGH.
* Then the MASTER generates the START condition (1)
* then the MASTER sends out slave address (1) (7 bits Slave address + 1 bit READ/WRITE)
(All three states belong to the arbitration process)
* after this the SLAVE ACKnowledges with a LOW bit.

(1) it reads in the SDA line all the time. And it loses arbitration when it READS LOW, while it releases the bus (expecting HIGH)
This happens almost immediately. (Almost = because of noise filters)

Klaus

 

[FvM]

The process of checking the SDA line to determine whether it's high or low, occurs during the arbitration phase before the start condition of a transmission.

I2C specification doesn't use the term arbitration phase, it's talking about arbitration process. Arbitration begins with start bit and can extend ultimately over complete transaction.

As stated above by KlausST, it's very unlikely that two masters start I2C transaction simultaneously. But if it happens, clock synchronization mechanism will cause both masters to continue it synchronized as long both are sending same SDA data.