I/O Pads (with ESD) - how to do it

[srivatsan]

I/O Pads (with ESD)

I have been trying to get I/O Pads logic. I would like to know if anyone has done and if so, i would be happy to know how you did it? Thanks.

 

[alastair41]

Re: I/O Pads (with ESD)

What do you want to know?

 

[srivatsan]

Re: I/O Pads (with ESD)

I would like to know the steps involved in designing the Analog I/o Pads with ESD protection.
srivats

 

[rtpq]

Re: I/O Pads (with ESD)

You can use a big diode for the first-stage ESD protection and employ a series resistor and a local small diode for the second-stage ESD protection.

 

[selvaraja]

Re: I/O Pads (with ESD)

it will depends on the frequency , power , voltage level, current drive and functionality.

 

[ianomaley]

Re: I/O Pads (with ESD)

As far as I know most commercial foundries provide library pads at no cost as a minimum. The problem usually is the documentation on these pads that is obscure regardin ESD in most cases.

Unless you require a very specific PAD, I strongly recommend you to ask the foundry or search in the internet a design kit for your target process including ESD protected PADS. If you are working with MOSIS in example, they provide library PADS, the same with europractice, or you can contact people in the universities that sometimes develop design kits.

Finally, if your target process is a particular technology with poor libraries and customer service, a first approach may be to copy the structure of a PAD from a well known process were you can obtain a library PAD with ESD protection.

As pointed in a previous message, appropiate diodes to ring VDD & VSS as well as series resistors constitute a ESD protected PAD. There are a couple of books you can download here on the topic.

 

[srivatsan]

Re: I/O Pads (with ESD)

thanks to everyone who answered my post....
i kinda got the i/o pads.. they seems to be fine.. i would just like to know the books that ianomaley told. thanks
srivatsan

 

[dumeHCM]

Re: I/O Pads (with ESD)

This is the book you need:

Basic ESD and I/O Design
by Sanjay Dabral, Timothy Maloney
Publisher: Wiley-Interscience; 1 edition (November 30, 1998)
ISBN: 0471253596

Search the board, if it's not uploaded, request it

 

[beckwang]

I/O Pads (with ESD)

In the simulation of output pad, owing to the power and gound noise, How to put inductance at the power and ground line? what is the suitable value?thanks!

 

[abhishek.k]

Re: I/O Pads (with ESD)

I would like to know the steps involved in designing the Analog I/o Pads with ESD protection.
srivats

For Analog Pad , metal rails should be such that the capacitance is minimum. Also you need to avoid the second stage resistor depending on voltage or current signal

 

[sunking]

I/O Pads (with ESD)

Many foudry have the design guide PADS.
You can get from there CDK

 

[qutang]

I/O Pads (with ESD)

diode can only standby 1000V