pippip
Newbie level 5
Re: Huge leakage for PIP(Poly1-Poly2) capacitor and antenna
Hi,
We have our TSMC0.35um chip back and we found out there is huge leakage current for the PIP capacitor (>1mA). The inter-poly oxide should have been breakdown. Both poly1 and poly2 are connected to metal1 first and then use metal1 connect to the bond pad.
The MIM capacitor has tiedown as the leakage path during metal plasma etching, which will protect the MIM. For the PIP capacitor, do we really need some reversed-biased diode or tiedown to provide a leakage path? We didn't do the antenna check before tapeout, it's a stupid mistake.......
We have successful tapeout using ON semi 1.5um (2P1M) for PIP capacitor years ago. That time we don't have any protection for PIP capacitor it still works. I am guessing the reason here, please correct me if I am wrong:
Low metal layers say Metal1 or Metal2 use wet etch. ON 1.5um has only Metal1, so antenna check is not necessary. However, for TSMC0.35um, there are 4 metal layers. The metal3 and metal4 are plasma etching, which will bring problem for our design.
Anybody here has tapeout experiences with TSMC0.35um or AMS0.35? Thank you! [/b]
Added after 1 hours 23 minutes:
I think some people mentioned guard rings for the PIP capacitors. Will the guard rings help protect the capacitors during plasma etching?
Hi,
We have our TSMC0.35um chip back and we found out there is huge leakage current for the PIP capacitor (>1mA). The inter-poly oxide should have been breakdown. Both poly1 and poly2 are connected to metal1 first and then use metal1 connect to the bond pad.
The MIM capacitor has tiedown as the leakage path during metal plasma etching, which will protect the MIM. For the PIP capacitor, do we really need some reversed-biased diode or tiedown to provide a leakage path? We didn't do the antenna check before tapeout, it's a stupid mistake.......
We have successful tapeout using ON semi 1.5um (2P1M) for PIP capacitor years ago. That time we don't have any protection for PIP capacitor it still works. I am guessing the reason here, please correct me if I am wrong:
Low metal layers say Metal1 or Metal2 use wet etch. ON 1.5um has only Metal1, so antenna check is not necessary. However, for TSMC0.35um, there are 4 metal layers. The metal3 and metal4 are plasma etching, which will bring problem for our design.
Anybody here has tapeout experiences with TSMC0.35um or AMS0.35? Thank you! [/b]
Added after 1 hours 23 minutes:
I think some people mentioned guard rings for the PIP capacitors. Will the guard rings help protect the capacitors during plasma etching?