It will depend on the verification tool set that you would use. If you are using Calibre, Mentor Graphics has its own style of writing a rule deck, you can refer the SVRF for the syntax and try and code it though difficult.
Hercules from Synopsys again is different. Sometimes the tool vendors themselves code the rule decks. In case of older technologies, lesser rules to be coded things were easy. My suggestion contact an FAE of the verificaiton toolset you are using.
Yes,DRC and LVS or EXT file are hard to code by outself,but sometime it is important to have the ability to read ,modify or even write the file yourself...
I would also like to see whether there are some expert in this field who're going to give some advices
Most of the sample syntaxs on basics DRC and LVS is available from the manual/user-guides.
This is depends which verification sign-off tool you are using.
Most of the time this is provided by your Foundry as part of the PDK suites.
OR provided by your company process team provided you are not a fabless company.
From 300mn to 130mn sounds ok, but when goes deep into deep-submicron, it is very tough and design rules keep multiplying just like the transistor counts ~ moores law
Yes, As everybody said...Every rule deck will be written in it's own style according to the verfication tool you use.
As a newbie, It will be very difficult to write the entire rule deck. Actually all the cad engineers also don't wirte everything. Foundry it self provides a rule file and according the company to company guidelines they will modify it.
So what you can do is....You just start reading the original rule files. You can get the help from SVRF files.
Calibre SVRF file is a very good one...where you can learn much...!!!
After that try to modify some rules are try to add some rules.
Then if you feel you can, Write the entire runset. Thank You.