They are not included in the code. In fact ISE would not recognize that as valid RTL code.
The routing contraints are part of the programming file that is generated by XST.
I haven't used the directed routing feature, but the Constraints Guide says to use FPGA Editor to extract the route description string (like the example you've shown) from a routed device, and then apply it as a ROUTE constraint the next time you run place-and-route.
The Constraints Guide (I have 9.1i) has two small sections named Directed Routing. Be sure to read them both.
Use this feature sparingly. It's intended for special situations, not for most projects.