Once you generate a core add the .xco file to your project ........and look for file with extension .veo it will contain the instantiation template ...just write a top module under which you can instantiate your core all the generated files by coregen will be in the directory ipcore of our project directory
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The following files were generated for 'floating_point_v5_0' in directory F:\Documents and Settings\fp_alu\ipcore_dir\
floating_point_v5_0.asy: Graphical symbol information file. Used by the ISE tools and some third party tools to create a symbol representing the core.
floating_point_v5_0.gise: ISE Project Navigator support file. This is a generated file and should not be edited directly.
floating_point_v5_0.ngc: Binary Xilinx implementation netlist file containing the information required to implement the module in a Xilinx (R) FPGA.
floating_point_v5_0.sym: Please see the core data sheet.
floating_point_v5_0.v: Verilog wrapper file provided to support functional simulation. This file contains simulation model customization data that is passed to a parameterized simulation model for the core.
floating_point_v5_0.veo: VEO template file containing code that can be used as a model for instantiating a CORE Generator module in a Verilog design.
floating_point_v5_0.vhd: VHDL wrapper file provided to support functional simulation. This file contains simulation model customization data that is passed to a parameterized simulation model for the core.
floating_point_v5_0.vho: VHO template file containing code that can be used as a model for instantiating a CORE Generator module in a VHDL design.
floating_point_v5_0.xco: CORE Generator input file containing the parameters used to regenerate a core.
floating_point_v5_0.xise: ISE Project Navigator support file. This is a generated file and should not be edited directly.
floating_point_v5_0_readme.txt: Text file indicating the files generated and how they are used.
floating_point_v5_0_xmdf.tcl: ISE Project Navigator interface file. ISE uses this file to determine how the files output by CORE Generator for the core can be integrated into your ISE project.
floating_point_v5_0_flist.txt: Text file listing all of the output files produced when a customized core was generated in the CORE Generator.
Please see the Xilinx CORE Generator online help for further details on generated files and how to use them.
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here is example template
Code:
//----------- Begin Cut here for INSTANTIATION Template ---// INST_TAG
floating_point_v5_0 YourInstanceName (
.a(a), // Bus [31 : 0]
.b(b), // Bus [31 : 0]
.operation(operation), // Bus [5 : 0]
.clk(clk),
.result(result)); // Bus [31 : 0]
// INST_TAG_END ------ End INSTANTIATION Template ---------
then details can be obtained read from the Datasheet .