How to use alter@ lcell in Verilog RTL code?

[billjoy]

verilog lcell

How to use alter@ lcell in Verilog RTL code?
tks in advance!

 

[glock17]

lcell verilog

LCELL <instance_name> (.in(<input_wire>), .out(<output_wire>);

 

[jas_bakshi]

lcell

in altera u can use megawizard functions......u can generate the megafunction and then include them into ur design.