I want to add a termnation resistor to reduce the overshoot of a signal. I configured in Quartus to be 25 Ohm resistance, but it gives me back an error. It says it is not posible to use with 3.3VTTL/LVCMOS.
In case you are wondering, I am generating a SPWM. There are a total of 7 outputs from my FPGA (3 signals + their complementaries and the Enable signal). I am using a Cyclone V.
25Ohms?
It seems you are mixing drive strength with termination.
--> the termination depends on the signal trace characteristic impedance.
Terminiation is not related to the IC, but to the PCB layout.
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Mind that when you measure with a scope: The scope´s probe will modify impedance and thus you may see a different signal than there is without the scope probe.
Then how do I reduce the overshoot. I am going to work with other drivers and I shouldn't let my FPGA give more than 3.3V or it may reduce the board's life. The peaks are of 4.5-4.7V in average.
I wanted to make different comprobations, so I was thinking in a test with a 25 Ohm and another one with 48 Ohm. I also changed yesterday the current strength, but it didn't change anything at all, it is not related.
Show us your schematic, and PCB layout and tell us what signals you are talking about.
Possible solutions:
* improved PCB layout
* adjusted FPGA output driver setting ("slow" mode, reduced dV/dt)
* serial resistor at the driver
* RC at the end of the trace
Drive strength is related to driver output impedance although not calibrated, you can derive the output impedance range for each drive strength from Ibis files. But typically even the lowest drive strength is giving too low driver impedance, so you need additional external series resistors to match your line impedance.