Sumathigokul
Member level 1

HI,
Good day to all.
If suppose the HDL/ netlist code for FPGA design is obfuscated, how to understand it?? Is there any systematic procedure to perform it??
Thank you in advance.
Regards,
SUMATHI G.
Good day to all.
If suppose the HDL/ netlist code for FPGA design is obfuscated, how to understand it?? Is there any systematic procedure to perform it??
Thank you in advance.
Regards,
SUMATHI G.