I dont know how to test the memory with mbist in chip after chip fabricated?
Does the chip will be tested in ATE? Or just test them in PCB?
I want to know the exact flow.
I have simulated this mbist functionality. And it passed.
But this simulation is just a simulation. My question is: how to test it after die or chip fabricated? should it is test in ATE?
Yes, Memories are tested on ATE after fabrication. Memory can have following faults.
1. Stuck-At Fault (SAF)-Cell or line sticks at 0 or 1.
2. Transition Fault (TF)-Cell fails to transit from 0 to 1 or 1 to 0.
3. Stuck-Open Fault (SOF)-Cell not accessible due to broken line.
4. State Coupling Fault (CFst)-Coupled cell is forced to 0 or 1 if coupling cell is in given state.
5 .Address-Decoder Fault (AF)-A functional fault in the address decoder.
you noted, you have simulated the mbist, so you know waht it is doing?
if I write a ATE test, I expect during my simulation to see from outside the DUT, the result of my bist for example, no? I means I control the start of the bistt, I know when it is finished,and I know when it pass or faild (I forced some error in memory).