how to test decoder 2 to 4

[boyzzun]

i have a homework that i have to code the decoder 2_4 like ic 74139,then i found the code for this

library ieee ;
use ieee.std_logic_1164.ALL;
entity decoder_2_4 is
port( a : in std_logic_vector(1 downto 0);
      en : in std_logic;
	  y : out std_logic_vector(3 downto 0)
	  );
end entity;
architecture cond_arch of decoder_2_4 is

begin
	
    y <= "0000" when (en='0') else
	     "0001" when (a="00") else
		 "0010" when (a="01") else
		 "0100" when (a="10") else
		 "1000";
end cond_arch;

but i don't know the code test for this,could you help me

 

[TrickyDicky]

first of all, I suggest writing a testbench.

 

[boyzzun]

first of all, I suggest writing a testbench.

but i don't know how to write the testbench

 

[TrickyDicky]

a testbench is just a VHDL file instantiating your unit under test. The inputs are just generated in the testbench, something like this:

input <= '1', '0' after 1 us, '1' after 2us;

or you can use wait statements inside a process.