[SOLVED] How to simulate AND logic using MOSFET's in Proteus?

[ADGAN]

Hi! I want to simulate AND operation using MOSFET's in Proteus. I have attached a screenshot of the design. But I'm not getting the necessary output. (when A and B is logic 1 Z should be logic 1) What is the mistake?

 

[FvM]

Various errors occured when copying the circuit form your text book.

Use PMOS in place of NMOS and vice versa, connect PMOS vertically flipped with source and substrate to VDD, add a missing connection point.

 

[ADGAN]

The circuit seems to be correct. I just tried interchanging the components bt still the result is same. I'm not sure whether I choose the correct MOSFET.

 

[FvM]

The circuit seems to be correct.

Is it so?

You can approach the problem in two ways:

- copy a CMOS AND gate from literature
- derive the circuit respectively correct a wrong approach based on known behaviour of MOS transistors

Presently I'm under the impression that you have difficulties with either method. Please compare your circuit (without the inverter) little-by-little with the below shown copy from an ASIC library. Pay attention to the letters "N" and "P" and the position of source terminals.

To be honest, the position of source terminals doesn't actually matter because source and drain are interchangeable. But the MOS transistors used in your simulation have source and substrat terminal shorted against each other, and the substrate connection definitely matters. In a standard CMOS process, all N substrates are connected to GND and all P substrates to VDD. To model it exactly, you would use transistor symbols with separate substrate connection.

 

[ADGAN]

Thanks for the reply FVM. I do not want to use the MOSFET with substrat terminal. Since I couldn't find a typical MOSFET I used this. It would be better if I could find it in Proteus.

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Anyway its working now. Thank you very much.