I kind of new in the simulation tools (cadance). I wan to ask how I gonna set initial condition for my circuit with "extracted" (post simulation) juz like when in schematic. I need to setup some initial conditions in order to make the system converge. Can anybody tell me how to do that because is quite urgent for me?
Thanks you.
---------- Post added at 01:22 ---------- Previous post was at 01:11 ----------
Same procedure as in schematics. Just find the corresponding node names.
Hint: If you label these nodes in layout, they'll keep their names in the extracted netlist.
Because of node- and element-bloat in the extracted netlist,
you may need to allow the simulator more iterations to get
convergence done.
Working through a series of degreasing gmin, starting from
something like 1E-9 (everybody leaks 1nA) and backing down
to default level, can give you a good restore file.