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How to select the Cl when design a current-steering DAC?

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stpluto

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In some papers and datasheets, there are a big capacitor at the output which in parallel with the load resistor.
For example: in the ADV7125, Cl=10pF **broken link removed**
In " A 12-Bit Intrinsic Accuracy High-Speed CMOS DAC," IEEE JSSC Dec 1998, Cl=10pF
Why they use so big capacitor and how to choose the value of the capacitor?
 

It's not the external capacitor. It is PAD and Loading's parasitic capacitor, that is about 10Pf
 

u mean the pad and the external loading's parasitical capacitors is about 10pF?
can u give me more info about this?
 

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