How to design the amplifier in the current steering DAC?

[wjxcom]

Hi all, design a 12bits, 50MHz DAC. The schematic diagram is as follows. What puzzles me is how to determine the swing rate and bandwidth of the amplifier? I use a two-stage amplifier.
I assume that the output signal of the amplifier is V=A * sin (2 * 3.14 * f * t), so dV/dt = 2 * 3.14 * f *A * cos (2 * 3.14 * f * t). If A = 1.2V and f = 50MHz, the slew rate will be about 2 * 3.14 * 50MHz * 1.2 ≈ 376V/ us. This value is too big! Maybe I made a mistake? Help me please, thanx!!

 

[Dominik Przyborowski]

Slew rate has to be high enough to settle full amplitude within half clock period and 0.5LSB accuracy, while GBW should be high enough to ensure the same with small signal (not only one LSB but several LSBs).
So, yes OPAMP in such design is demanding.

--- Updated Aug 23, 2022 ---

There is an IEEE standard on DAC metrics, I think it is 1651 (but I might be wrong)

--- Updated Aug 23, 2022 ---

There is an IEEE standard on DAC metrics, I think it is 1651 (but I might be wrong)

 

[dick_freebird]

Depending on application you might forgo the op amp. As part of a SAR ADC you might feed the comparator input directly. But if you are looking for a.programmable output voltage to use, you need a TIA as shown.

For best accuracy you might want to embed the feedback resistors for the TIA with the DAC R/2R and reference related resistors on that chip and stick to identical geometry etc. to drive down "make" tolerances.

 

[dick_freebird]

Something about the differential DAC scheme has been
bothering me. That is, the IDAC requires a clean virtual-
ground to get proper operation and you have two horns
that both need to sit right. But the job of the op amp
common mode feedback is to keep -outputs- centered
pairwise (keeping Vid=0) but can't control input common
more position.

I suspect that code transitions may result in uncorrected
op amp input deflection, with only input CMRR to fix it,
and that the output CMFB may also (by virtue of being
designed slower than forward amplifier path) contribute
a long low settling time tail.

You might want to look more carefully at amplifier care-
abouts in the application performance-spec context.
Offset errors (w/ dynamic step-to) and settling time in
particular.

 

[Dominik Przyborowski]

Yes, such guy needs CMFB at input as well.