In my design, I have some special pairs of wires. The two signals in each pair should be totally matching with each other, having the same transmission delay like "differential signals". Is there any commands that I could use as timing constraint or routing options in Encounter? Thanks
Thanks rca,
To explain my question in detail. I have an example, the output pin of block A (out_A) is connect to inputs of 10 cells B1-B10 (in_B1, in_B2... in_B10), all these connections between out_A and in_B* are actually one net in the netlist, in other words, they share the same net name. Now another block C is connected to the other input of B10 (out_C connected with in2_B10). I just want the two wires out_A and out_C arriving at block B10 at the same time.
It seems to me that constraints for sheilding and matching are over nets, so if I add constraints on out_A net, the constraints will be on all wires from A to B1...B10. But I don't need a balanced distribution of out_A to all ten B cells. Can we add constraints from pin to pin instead of on nets? something like
delay_of_wire (from out_A to in_B10) = delay_of_wire (from out_C to in2_B10)