i am using inverter in my project....i am using 130 nm tech...
and i am getting spikes...please help me in reducing the spikes in
the output of the inverter...
Re: how to reduce spikes in inverter without using out put c
You can reduce glitches at transition edges by reducing clock feedthrough. this can be achieved by reducing transistors' sizes or by reducing the transition slope of the input waveform.
Re: how to reduce spikes in inverter without using out put c
You also may consider bypass capacitors. What is the frequency of the chopper? Once you know the chopper frequency, calculate the Xc for the bypass capacitors to be 0 Ohms. Then consider using ferrite beads on the output wires for that frequency range. That should reduce a fair amount of the noise from the chopper.
Re: how to reduce spikes in inverter without using out put c
generally switching transistors cause glitch due to kickback noise and clock feedthrough and hence these are generally separated from the input and output using a transistor which is always on......