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How to properly bias this class-AB output stage?

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jordan76

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Hi

I am at a loss how to properly bias this class-AB output stage.
How should the proper size of M202(M2021),M203(M2031),M113/M115,M110, M112 and M219 be determined? How about VA and VB?

Your help will be greatly appreciated. Thanks in advance!

regards,
jordan76
 

Hi guys,

The above circuit is intercepted from a IEEE paper named Compact Low-Voltage Power-Efficient Operational Amplifier Cells for VLSI by Klaas-Jan de Langen and Johan H. Huijsing,
IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 33, NO. 10, OCTOBER 1998.

My main question is how the dc bias voltage VA and VB should be determined.
In my opinion VA and VB should be floating unless some kind of negative dc feedback is applied, but I didn't find it in this paper. How do you think about it?

thanks!

regards,
jordan76
 

You haven't read the paper thoroughly enough: VA and VB voltage are controled nicely through feedback loop by measuring the output static current. In other words, VA and VB is set in such a way that the desired output static current can be obtained, through feedback loops.
 

Hi willyboy19,

Thanks for your reply!

VA-VB=VDD-VTN-|VTP|-Vdsatp-Vdsatn
Iq=2*Iref (assume M110/M100 and M111/M101 are equal in size)

Please correct me if I am wrong.

regards,
jordan76
 

Hi Jordan76, your understanding is correct. Congratulations!
 

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