I first recommend (if the layout is of manageable size) that you
open the av_extracted view, turn off all but instance/dwg layer,
select all and wade through the list of pcapacitors looking for
values large enough to matter. This will be "situational". You
might like to rerun extraction with a series of minimum-C values
(ignore, below) set and see where misbehavior rolls on, this
can clue you in to a range of C that has effect and narrow
your searching.
If you can (cross-)probe nets on the extracted view you may
be able to determine which ones are affected to cause your
issue. Then you can select devices for net, go to extracted view
and select nets for device, and see where the intersection is
physically.
It may be that the circuit contains bad art, such that any
capacitance at all will ruin performance. Such as (say) a soft
start whose charging current is not right, really just pullup
FET leakage and 10fF will kill you while 10aF looks "OK".
Rolling through minimum-C-extract-threshold might be good
for this kind of shotgun search for sort spots.