Aug 26, 2017 #1 K karthickv Newbie level 1 Joined Aug 26, 2017 Messages 1 Helped 0 Reputation 0 Reaction score 0 Trophy points 1 Activity points 15 hi guys, Iam using timer in lpc2148 and i have doubt in the below code PLL0CON = 0x01; //Enable PLL PLL0CFG = 0x24; //Multiplier and divider setup PLL0FEED = 0xAA; //Feed sequence PLL0FEED = 0x55; while(!(PLL0STAT & 0x00000400)); //is locked? if PLL0STAT is the status of PLL0.Then what is 0x00000400 i saw in google that is desired frequency. if it is desired frequency then how i determine the desired frequency in hexa decimal.Thanks in advance
hi guys, Iam using timer in lpc2148 and i have doubt in the below code PLL0CON = 0x01; //Enable PLL PLL0CFG = 0x24; //Multiplier and divider setup PLL0FEED = 0xAA; //Feed sequence PLL0FEED = 0x55; while(!(PLL0STAT & 0x00000400)); //is locked? if PLL0STAT is the status of PLL0.Then what is 0x00000400 i saw in google that is desired frequency. if it is desired frequency then how i determine the desired frequency in hexa decimal.Thanks in advance
Aug 26, 2017 #2 FvM Super Moderator Staff member Joined Jan 22, 2008 Messages 52,512 Helped 14,757 Reputation 29,796 Reaction score 14,128 Trophy points 1,393 Location Bochum, Germany Activity points 298,477 Then what is 0x00000400 i saw in google that is desired frequency. Click to expand... No, it's a mask for checking locked state in status register. Desired PLL frequency is determined by crystal frequency, multiplier and divider values. Better review LPC214x User manual, chapter 4.8 PLL.
Then what is 0x00000400 i saw in google that is desired frequency. Click to expand... No, it's a mask for checking locked state in status register. Desired PLL frequency is determined by crystal frequency, multiplier and divider values. Better review LPC214x User manual, chapter 4.8 PLL.