[ARM] How to lock desired frequency in PLL LPC2148

[karthickv]

hi guys,
Iam using timer in lpc2148 and i have doubt in the below code

PLL0CON = 0x01; //Enable PLL
PLL0CFG = 0x24; //Multiplier and divider setup
PLL0FEED = 0xAA; //Feed sequence
PLL0FEED = 0x55;

while(!(PLL0STAT & 0x00000400)); //is locked?

if PLL0STAT is the status of PLL0.Then what is 0x00000400 i saw in google that is desired frequency. if it is desired frequency then how i determine the desired frequency in hexa decimal.Thanks in advance

 

[FvM]

Then what is 0x00000400 i saw in google that is desired frequency.

No, it's a mask for checking locked state in status register.

Desired PLL frequency is determined by crystal frequency, multiplier and divider values.

Better review LPC214x User manual, chapter 4.8 PLL.