How to implement SRAM with standard logic (DFF)?

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newcpu

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Hi,

I want to replace those small SRAM/Register File compiled by memory compiler with standard logic (DFF). Could you help to provide some references?

Thanks a lot.

Best Regards,
Newcpu
 

See Leblebici's book on Digital IC Design
 

Are there any simple method to verify the verilog code for this?
Thanks a lot.
 

How to design the decode logic for address?
Thanks a lot.
 

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