How to get off some cells like "**SEQGEN**" in DC

[bigdog]

Hello,

I want to compile my design to gate-level with DC, but I always got some cells like **SEQGEN** in the netlist, I have no idea about the reason, that seems like I didn't finish the compiling, is the anyone knows that?

Regrads,

 

[RBB]

DC couldn't find an equivalent cell in the target library. You should be able to determine what logic DC is trying to map to this "non"-found cell.

 

[vlsichipdesigner]

Re: How to get off some cells like "**SEQGEN**" in

hi,

my 2cents,

please check whether you had kept set_dont_touch on these registers or designs so that tool could not go ahead in mapping.

also, please check your list of set_dont_use cells, some of the cells in the dont use list is what wanted for this specific mapping as tool is not finding, it is not able to map, please revisit this as well

hope this should help you out.

myprayers,
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